Summary:
- add 4v2 and 0v75 vr fault error event type

Test Plan:
- Build code: Pass
- Verified TRAY_INFO_REG read returns correct values

Summary:
- add tray location info in test info shell cmd

Test Plan:
- Build code: Pass
- Verified TRAY_INFO_REG read returns correct values

Summary:
- Added init_U200053_IO() with new address definition (U200053_IO_ADDR = 0x3B)
- Moved U200070 IO expander initialization out of init_U200052_IO()
- Updated IO configurations and default output values for U200052/U200053/U200070
Test Plan:
- Build: PASS
- Verified IO expander init sequence on EVB/EVB2 boots

Summary:
- add shell cmd get_mb_pwr_en

Test LOG:

uart:~$ get_mb_pwr_en
MB PWR_EN : 0
uart:~$ test cpld dump 0 10
00000000: ff bf ff ff ff fe 80 ff  ff ff

Summary:
- Modify ASIC temp low limit threshold default value to -10C
Test Plan:
- Build code: Pass

Summary:
- Added support for syncing CPLD_ASIC_RESET_STATUS_REG to board IO expanders.
- U200070 (EVT2): map CPLD bit5~3 to io0~2 (power-on reset signals).
- U200053 (EVT1B): map CPLD bit2 to io6 (HAMSA_SYS_RST_PLD_L).
- U200052 (EVT1B): map CPLD bit1~0 to io6~7 (MEDHA0/1_SYS_RST_PLD_L).
- Update is triggered only when CPLD reset register changes, reducing I2C traffic.
Test Plan:
- EVB: verify CPLD bit changes reflect on U200052/U200053 IO expanders.
- EVT2: verify CPLD bit5~3 update U200070 io0~2 correctly.
- Build: Pass.

Summary:
- Initialize U200053 and U200070 IO expanders during ISR_GPIO_RST_IRIS_PWR_ON_PLD_R1_N.
- Ensures correct IO default state at IRIS power-on.
Test Plan:
- ISR trigger and IO init verified
- Build: Pass

Summary:
- Version commit for sb-rb-20255001

Test Plan:
- Build code: Pass
- Check BIC version: Pass

Summary:
- fix GPIO pin MEDHA1_SW_EN

Test LOG:
uart:~$ platform gpio list_all
[0  ] FM_ASIC_0_THERMTRIP_R_N            : PP  | input (I) | 1(1)
[1  ] RST_IRIS_PWR_ON_PLD_R1_N           : PP  | input (I) | 1(1)
[2  ] HAMSA_SW_EN                        : PP  | output(O) | 0(0)
[3  ] MEDHA0_SW_EN                       : PP  | output(O) | 0(0)
[5  ] ALL_VR_PM_ALERT_R_N                : PP  | input (I) | 1(1)
[6  ] SMB_HAMSA_MMC_LVC33_ALERT_N        : PP  | input (I) | 1(1)
[7  ] FM_PLD_UBC_EN_R                    : PP  | input (I) | 1(1)
[23 ] MEDHA0_HBM_CATTRIP_MMC_LVC33_R_ALARM: PP  | input (I) | 0(0)
[40 ] SPI_MEDHA0_MUX_IN1                 : PP  | output(O) | 0(0)
[41 ] SPI_MEDHA1_MUX_IN1                 : PP  | output(O) | 0(0)
[42 ] SPI_HAMSA_MUX_IN1                  : PP  | output(O) | 0(0)
[43 ] QSPI_CPLD_SEL_0                    : PP  | output(O) | 0(0)
[47 ] MEDHA1_HBM_CATTRIP_MMC_LVC33_R_ALARM: PP  | input (I) | 0(0)
[50 ] QSPI_CPLD_SEL_1                    : PP  | output(O) | 0(0)
[51 ] NC_SPI_MEDHA0_CRM_MUX_IN1          : PP  | output(O) | 0(0)
[52 ] NC_SPI_MEDHA1_CRM_MUX_IN1          : PP  | output(O) | 0(0)
[57 ] NC_SPI_HAMSA_CRM_MUX_IN1           : PP  | output(O) | 0(0)
[58 ] MEDHA1_SW_EN                       : PP  | output(O) | 0(0)
[60 ] GPIO74_STRAP_DSW_EN                : PP  | input (I) | 1(1)
[61 ] GPIO75_STRAP_JEN_N                 : PP  | input (I) | 1(1)
[65 ] I3C_RAINBOW_ALERT_R_N              : PP  | input (I) | 1(1)
[66 ] LED_MMC_HEARTBEAT_R                : PP  | output(O) | 0(0)
[80 ] MEDHA0_CURRENT_SENSE_0_LS_LVC33_R  : PP  | input (I) | 0(0)
[81 ] MEDHA0_CURRENT_SENSE_1_LS_LVC33_R  : PP  | input (I) | 1(1)
[83 ] MEDHA1_CURRENT_SENSE_0_LS_LVC33_R  : PP  | input (I) | 0(0)
[84 ] MEDHA1_CURRENT_SENSE_1_LS_LVC33_R  : PP  | input (I) | 1(1)
[88 ] RSVD_GPIO_1                        : PP  | input (I) | 1(1)
[100] MEDHA0_CNV                         : PP  | output(O) | 1(1)
[101] MEDHA1_CNV                         : PP  | output(O) | 1(1)
[122] SMB_MEDHA0_CRM_MMC_LVC33_ALERT_N   : PP  | input (I) | 1(1)
[123] SMB_MEDHA1_CRM_MMC_LVC33_ALERT_N   : PP  | input (I) | 1(1)

Summary:
- enable sensor polling when 1-step
- T17CISB-867

Test LOG:
uart:~$ iris_power steps_on
set FM_PLD_UBC_EN                       success
P12V_UBC2_PWRGD      1
P12V_UBC2_PWRGD      1
uart:~$ iris_power steps_on
set FM_P3V3_EN                          success
PWRGD_P3V3_R         1
uart:~$ iris_power steps_on
set FM_P4V2_EN_R                        success
PWRGD_P4V2           1
uart:~$ iris_power steps_on
set FM_P5V_EN                           success
PWRGD_P5V_R          1
uart:~$ platform sensor list_all_sensor
[0xc ] RB_SLOT_1_ASIC_P0V85_MEDHA0_VDD_TEMP_C           : raa228249          | access[O] | poll 0.20(   1) sec | sensor_enabled        |     29.000
[0x10] RB_SLOT_1_ASIC_P0V85_MEDHA1_VDD_TEMP_C           : raa228249          | access[O] | poll 0.23(   1) sec | sensor_enabled        |     28.000
[0x14] RB_SLOT_1_ASIC_P0V9_OWL_E_TRVDD_TEMP_C           : raa228249          | access[O] | poll 0.26(   1) sec | sensor_enabled        |     27.000
[0x15] RB_SLOT_1_ASIC_P0V9_OWL_E_TRVDD_VOLT_V           : raa228249          | access[O] | poll 0.29(   1) sec | sensor_enabled        |      0.009
[0x16] RB_SLOT_1_ASIC_P0V9_OWL_E_TRVDD_CURR_A           : raa228249          | access[O] | poll 0.32(   1) sec | sensor_enabled        |      0.000
[0x17] RB_SLOT_1_ASIC_P0V9_OWL_E_TRVDD_PWR_W            : raa228249          | access[O] | poll 0.35(   1) sec | sensor_enabled        |      0.000
[0x74] RB_SLOT_1_ASIC_P0V9_OWL_E_TRVDD_INPUT_VOLT_V     : raa228249          | access[O] | poll 0.38(   1) sec | sensor_enabled        |     13.710

Summary:
- fix GPIO name LV1 PWR CAP

Test LOG:
uart:~$ platform gpio list_all
[0  ] FM_ASIC_0_THERMTRIP_R_N            : PP  | input (I) | 1(1)
[1  ] RST_IRIS_PWR_ON_PLD_R1_N           : PP  | input (I) | 1(1)
[2  ] HAMSA_SW_EN                        : PP  | output(O) | 0(0)
[3  ] MEDHA0_SW_EN                       : PP  | output(O) | 0(0)
[5  ] ALL_VR_PM_ALERT_R_N                : PP  | input (I) | 1(1)
[6  ] SMB_HAMSA_MMC_LVC33_ALERT_N        : PP  | input (I) | 1(1)
[7  ] FM_PLD_UBC_EN_R                    : PP  | input (I) | 1(1)
[23 ] MEDHA0_HBM_CATTRIP_MMC_LVC33_R_ALARM: PP  | input (I) | 0(0)
[40 ] SPI_MEDHA0_MUX_IN1                 : PP  | output(O) | 0(0)
[41 ] SPI_MEDHA1_MUX_IN1                 : PP  | output(O) | 0(0)
[42 ] SPI_HAMSA_MUX_IN1                  : PP  | output(O) | 0(0)
[43 ] QSPI_CPLD_SEL_0                    : PP  | output(O) | 0(0)
[47 ] MEDHA1_HBM_CATTRIP_MMC_LVC33_R_ALARM: PP  | input (I) | 0(0)
[50 ] QSPI_CPLD_SEL_1                    : PP  | output(O) | 0(0)
[51 ] NC_SPI_MEDHA0_CRM_MUX_IN1          : PP  | output(O) | 0(0)
[52 ] NC_SPI_MEDHA1_CRM_MUX_IN1          : PP  | output(O) | 0(0)
[57 ] NC_SPI_HAMSA_CRM_MUX_IN1           : PP  | output(O) | 0(0)
[58 ] MEDHA1_SW_EN                       : PP  | output(O) | 0(0)
[60 ] GPIO74_STRAP_DSW_EN                : PP  | input (I) | 1(1)
[61 ] GPIO75_STRAP_JEN_N                 : PP  | input (I) | 1(1)
[65 ] I3C_RAINBOW_ALERT_R_N              : PP  | input (I) | 1(1)
[66 ] LED_MMC_HEARTBEAT_R                : PP  | output(O) | 0(0)
[80 ] MEDHA0_PWR_CAP_LV1_LVC33           : PP  | input (I) | 0(0)
[81 ] MEDHA1_PWR_CAP_LV1_LVC33           : PP  | input (I) | 1(1)
[88 ] RSVD_GPIO_1                        : PP  | input (I) | 1(1)
[100] MEDHA0_CNV                         : PP  | output(O) | 1(1)
[101] MEDHA1_CNV                         : PP  | output(O) | 1(1)
[122] SMB_MEDHA0_CRM_MMC_LVC33_ALERT_N   : PP  | input (I) | 1(1)
[123] SMB_MEDHA1_CRM_MMC_LVC33_ALERT_N   : PP  | input (I) | 1(1)

Summary:
- add CHIPMODE T17CISB-862

Test LOG:

uart:~$ i2c read I2C_0 22 8c 3
00000000: fd ff fd                                         |...              |
uart:~$ boo
  bootstrap         bootstrap_MFIO16
uart:~$ bootstrap set HAMSA_MFIO6 1
Can't change due to HAMSA_TEST_STRAP_R is 0x00

uart:~$ bootstrap set HAMSA_TEST_STRAP_R 1
Set HAMSA_TEST_STRAP_R 1, volatile
uart:~$ i2c read I2C_0 22 8c 3
00000000: fd 3f fc                                         |.?.              |
uart:~$ bootstrap set HAMSA_MFIO6 1
Set HAMSA_MFIO6 1, volatil

uart:~$ i2c read I2C_0 22 84 3
00000000: fd 40 00                                         |.@.              |
uart:~$ bootstrap set HAMSA_MFIO8 1
Set HAMSA_MFIO8 1, volatile

uart:~$ i2c read I2C_0 22 84 3
00000000: fd c0 00                                         |...              |
uart:~$ bootstrap set HAMSA_MFIO10 1
Set HAMSA_MFIO10 1, volatile

uart:~$ i2c read I2C_0 22 84 3
00000000: fd c0 01

Summary:
- Modify ASIC temp low limit threshold default value to 0C
Test Plan:
- Build code: Pass

Summary:
- fix set value to table with IO when change input to output

Test Plan:
- Build code pass
- test with bootstrap

Summary:
- Version commit for sb-rb-20255004
Test Plan:
Build code: Pass
Check BIC version: Pass

Summary:
- Add BOARD_TYPE and BOARD_STAGE display.
- Add VR_VENDOR_TYPE, UBC_TYPE, VR_TYPE, and TMP_TYPE display.
Test Plan:
- Build: Pass
- Function Test: Pass

Summary:
- Stop CPLD polling thread and thermal thread to avoid error when reboot
Test Plan:
- Build code: Pass
- Reboot test: Pass

Summary:
- Change U200051 OUTPUT_PORT default value from 0xA0 to 0x80
Test Plan:
- Build code:Pass
- Boot system and verify U200051 OUTPUT_PORT is 0x80

Summary:
- modify event log format
- modify temp events are only recorded once
- modify temp events error data
- fix jtag mux mapping

Test Plan:
- Build code: Pass

Summary:
- Add shell command "asic_mfio_debug" to manually set/get unassigned
  mfio value.
Test Plan:
- Build code: Pass
- Function check: Pass

Summary:
- add thermtrip event when init
- modify temp events low limit
- modify temp events format
- modify tmp432 open-circuit event in all stages

Test Plan:
- Build code: Pass

Summary:
- Add board type check in asic_mfio_debug shell command.
- Return error when command is executed on non-EVB boards.
- Follow-up change based on commit 553114a.
Test Plan:
- Buily code: Pass
- Function check: Pass

Summary:
- Version commit for sb-rb-20255101
Test Plan:
Build code: Pass
Check BIC version: Pass

Summary:
- disable unused function

Test Plan:
- Build code: Pass

Summary:
- disable polling before update reset

Test Plan:
- Build code: Pass
- update mmc without error
- reboot mmc without error

Summary:
- add adc_test get_good_status

Test Plan:
- Build code: Pass
- test command adc_test get_good_status

Summary:
- Remove blank in shell_plat_asic_mfio_debug .c
- Follow-up change based on commit ee89705.
Test Plan:
- Build code: Pass

Summary:
- fix CHIPMODE test strap pin
- before dc on, user can set MIFO6_8_10

Test Plan:
- Build code: Pass
- test MIFO6_8_10 before dc on and after dc on

Summary:
 - Update i2c_switch_control set all <0|1> to coordinate VR sensor polling with switch GPIO control.
 - Disable VR polling before setting HAMSA_SW_EN/MEDHA0_SW_EN/MEDHA1_SW_EN to 1.
 - Re-enable VR polling after setting HAMSA_SW_EN/MEDHA0_SW_EN/MEDHA1_SW_EN to 0.
Test Plan:
 - Build: Pass
 - Function check: Pass

Summary:
- Version commit for sb-rb-20255201

Test Plan:
Build code: Pass
Check BIC version: Pass

Summary:
- add vr test mode

Test Plan:
- Build code: Pass

Summary:
- add update boot0 version reading from asic

Test Plan:
- Build code: Pass

Summary:
- Update platform extension info mapping in plat_class.c so VR_MODULE_RNS reports
  "VR_RNS_RAA229140_RAA228249" (was "VR_MPS_RAA229140_RAA228249").
Test Plan:
- Build: Pass

Summary:
- Add mfio 12 13 14 in shell command "asic_mfio_debug"
mfio value.
Test Plan:
- Build code: Pass
- Function check: Pass

Summary:
- Add support for FRU board info registers 0x60~0x6C.
- Add support for FRU product info registers 0x70~0x76.
Test Plan:
- Build: Pass
- Function check: Pass

Summary:
- Add power capping function

Test Plan:
- Build: Pass
- Function check: Pass

Summary:
- update VR settings
- remove P3v3 voltage range and Vout setting
- modifiedvoltage range and Vout setting can only used in test mode

Test Plan:
- Build code: Pass

Summary:
- Version commit for sb-rb-20255301

Test Plan:
Build code: Pass
Check BIC version: Pass